The high performance Large Scale Integration (LSI) system that represents the application processor of a smartphone has a minimized power usage, which lowers a driving voltage and reduces a power supply voltage tolerance guaranteeing the operation of the system, and thus deteriorates power noise stability of the system.
In addition, an LSI system having increased processing speed and multifunctionality requires increased operating frequencies and current consumption, which results in an increased frequency with which the voltage fluctuates and increased high frequency components in the power noise, thus making it more difficult to ensure the stability of the system.
Specifically, since the high performance LSI has recently focused on power integrity design, it is necessary to reduce power supply impedance in order to reduce the frequency of voltage fluctuations and the power noise.
The power supply impedance is influenced by the design of the board and the design of the decoupling capacitor, and specifically, the power supply impedance is heavily influenced by the performance of the decoupling capacitor.
Therefore, in order to reduce the power supply impedance, it is necessary to use a low equivalence series inductance (ESL) decoupling capacitor having a low inductance.
While some low-ESL multilayer capacitors have been disclosed, it is expected that impedance will keep decreasing, considering the possibility that LSI systems will have lower voltage and larger current, and therefore, it is necessary for low ESL products to be continuously developed to provide further improved performance.